| AI Software Development Engineer | Seoul, Korea, South |
| Silicon Design Engineer 2 | Taipei, Taiwan |
| Packaging Engineer | Hsinchu, Taiwan |
| Life Sciences AI Research Engineer | Longmont, Colorado |
| Medical Imaging and AI Research Engineer | Longmont, Colorado |
| Advanced Packaging Integration Engineer | Santa Clara, California |
| Advanced Packaging Integration Engineer | Santa Clara, California |
| Advanced Packaging Integration Engineer | Austin, Texas |
| Principal Debug Engineer | Seattle, Washington |
| Principal Systems Validation Engineer | Seattle, Washington |
| AI Collaboration Solutions Architect | San Jose, California |
| AI Collaboration Solutions Architect | Austin, Texas |
| Principal Software Development Engineer | MARKHAM, Canada |
| Staff Engineer, SoC Emulation & Prototyping | San Jose, California |
| Physical AI SoC Architect | San Jose, California |
| Sr. Product Marketing Manager | San Jose, California |
| Sr. Manager - SOC Microarchitecture | Boxborough, Massachusetts |
| Program Manager, Product Engineering Organization | Austin, Texas |
| Timing/Power Methodology Architect | Austin, Texas |
| Technical Program Manager - Windows Software Platform Group (1 Year Temporary Contract) | MARKHAM, Canada |
| CPU Design Performance Engineer | Santa Clara, California |
| Advanced Packaging Integration Engineer | Austin, Texas |
| Sr. Information Lab Security Lead | Austin, Texas |
| Supplier Assurance Analyst | Austin, Texas |
| Sr. Financial Analyst - NTSG | Austin, Texas |
| Executive Support and Technology Lead | Austin, Texas |
| FPGA Design and Timing Modeling Engineer | CALIFORNIA, California |
| Sr. Manager Product Development Eng. | Austin, Texas |
| Software Engineer – AI Inference and Performance Optimization | Austin, Texas |
| Software Engineer – AI Inference Integration and Optimization | Austin, Texas |
| Software Engineer – AI Inference and Runtime Optimization | Austin, Texas |
| Technical Program Manager - Cluster Build | Seattle, Washington |
| Lead HPC & AI Performance Engineer - Center of Excellence | Helsinki, Finland |
| Application Software Optimization Engineer, HPC/AI Outreach & Enablement | Sweden |
| HR Operations Manager (Compliance) | Dublin, Ireland |
| Senior Agentic Systems & Applications Engineer | Helsinki, Finland |
| Sys/Test Validation Engineer | Hsinchu, Taiwan |
| Principal Semiconductor Packaging Technologist – Customer Solutions | San Jose, California |
| Physical Design Engineer | Shanghai, China |
| System Level Debug Staff Engineer | Penang, Malaysia |
| AI Framework Eng.(VLLM CI) | Shanghai, China |
| Hardware/System QA & Failure Analysis Engineer | Shanghai, China |
| Manager Packaging Engineering | Hsinchu, Taiwan |
| Senior AI Inference Engineer | Shanghai, China |
| Standard Cell Design & Characterization Engineer | MARKHAM, Canada |
| Senior Agentic AI Engineer | Beijing, China |
| Senior SLT Equipment Engineer | Penang, Malaysia |
| Silicon Design Engineer | Shanghai, China |
| Sr. Director, Client & Personal AI System Innovation | Austin, Texas |
| Hardware Systems Engineer -Data Center/Lab Environment | Secaucus, New Jersey |
| Lease Accounting Sr. Manager | Santa Clara, California |
| Devops Platform Engineer | San Jose, California |
| Hardware Engineer, Networking Switch Bring Up and Rack Level Performance Validation | Santa Clara, California |
| Senior Program Manager – New Product Introduction (NPI) | San Jose, California |
| Senior Data Center Acquisition Manager | Santa Clara, California |
| Director Corporate Strategy Partnerships and Ecosystem | Santa Clara, California |
| Corporate Development Manager-M&A | Santa Clara, California |
| Sr. Staff Physical Design Engineer | Austin, Texas |
| Lead Customer Systems Design Engineer | Austin, Texas |
| PLL Design Engineer | San Diego, California |
| Sr. Marketing Manager - AI Developer Campaigns & Growth | Austin, Texas |
| Sr. Marketing Manager - HPC & AI for Science | Austin, Texas |
| CPU Sales Specialist (CSS), EMEA Embedded | London, United Kingdom |
| Senior Lead Role - DFT | Bangalore, India |
| Staff AI researcher | Bangalore, India |
| Packaging Engineer | Hsinchu, Taiwan |
| Sr. System Design Mechanical Engineer | Secaucus, New Jersey |
| CPU Cores Performance Lead - Next Generation Core | Austin, Texas |
| Principal Software Engineer, Agentic AI | Austin, Texas |
| Fellow, Agentic AI Software | Austin, Texas |
| Sr. Systems Design Engineer | MARKHAM, Canada |
| Principal FPGA Design Engineer | Santa Clara, California |
| HR Business Partner Manager | Santa Clara, California |
| MTS Silicon Design Engineer | San Jose, California |
| Sr. Software Development Engineer | Austin, Texas |
| Sr. Firmware Engineer | Santa Clara, California |
| Sr. Network Engineer | Secaucus, New Jersey |
| MTS Network Engineer | Austin, Texas |
| Sr. Product Development Engineer | Austin, Texas |
| MTS Software Development Engineer | Austin, Texas |
| Sr. Product Development Engineer | Austin, Texas |
| Sr. Manager, Pricing Strategy/Planning | Austin, Texas |
| Sr. Silicon Design Engineer | San Jose, California |
| Product Development Engineer | Austin, Texas |
| Program Manager | Bellevue, Washington |
| PMTS Silicon Design Engineer | Santa Clara, California |
| SMTS Software Development Engineer | San Jose, California |
| SMTS Silicon Design Engineer | Austin, Texas |
| Sr. Software Development Engineer | Austin, Texas |
| Sr. Silicon Design Engineer | Austin, Texas |
| Software Development Engineer | Washington, United States |
| Sr. Software Development Engineer | San Jose, California |
| SMTS Systems Design Engineer | Austin, Texas |
| Silicon Design Engineer | San Jose, California |
| Manager Systems Design Engineer | Folsom, California |
| MTS Software Development Engineer | Austin, Texas |
| Sr. Software System Designer | Santa Clara, California |
| Sr. Silicon Design Engineer | San Jose, California |
| Sr. Field Apps Engineer (Xilinx SIP) | San Jose, California |
| Business Planning Specialist | Austin, Texas |
| Sr. Silicon Design Engineer | Austin, Texas |
| MTS Silicon Design Engineer | Santa Clara, California |
| Sr. Supply Chain Specialist | Austin, Texas |
| Silicon Design Engineer | Austin, Texas |
| MTS Silicon Design Engineer | San Jose, California |
| SMTS Silicon Design Engineer | Santa Clara, California |
| Sr. Silicon Design Engineer | Santa Clara, California |
| PMTS Software Development Engineer | Santa Clara, California |
| SMTS Systems Design Engineer | Austin, Texas |
| SMTS Silicon Design Engineer | San Diego, California |
| MTS Mask Design Engineer | Santa Clara, California |
| SMTS Silicon Design Engineer | Santa Clara, California |
| PMTS Silicon Design Engineer | Austin, Texas |
| MTS Software Development Engineer | Austin, Texas |
| Sr. Software Development Engineer | Santa Clara, California |
| PMTS Software System Design Engineer | Santa Clara, California |
| High Speed DAC Design Expert | San Jose, California |
| Sr. Manager Employment/ Staffing | Austin, Texas |
| Product Development Engineer | Austin, Texas |
| Sr. Silicon Design Engineer | Santa Clara, California |
| Supply Chain Specialist | Austin, Texas |
| Sr. Systems Design Engineer | Austin, Texas |
| MTS Silicon Design Engineer | Austin, Texas |
| Sr. Software Development Engineer | San Jose, California |
| Sr. Silicon Design Engineer | Santa Clara, California |
| Sr. Silicon Design Engineer | Santa Clara, California |
| MTS Silicon Design Engineer | Austin, Texas |
| Sr. Silicon Design Engineer | Santa Clara, California |
| MTS Systems Design Engineer | Santa Clara, California |
| Sr. Software Development Engineer | San Jose, California |
| Silicon Design Engineer | San Diego, California |
| MTS Software Development Engineer | Santa Clara, California |
| Sr. Systems Design Engineer | Santa Clara, California |
| Sr. Software Development Engineer | Boxborough, Massachusetts |
| Product Development Engineer | Austin, Texas |
| Sr. Supply Chain Specialist | Austin, Texas |
| MTS Silicon Design Engineer | San Jose, California |
| MTS IT Engineer | Austin, Texas |
| Silicon Design Engineer | Austin, Texas |
| Systems Design Engineer | Austin, Texas |
| Sr. Program Manager | San Jose, California |
| SMTS Software Development Engineer | Santa Clara, California |
| SMTS Hardware Development Engineer | Secaucus, New Jersey |
| Sr. Silicon Design Engineer | Orlando, Florida |
| Software Development Engineer | Austin, Texas |
| MTS Systems Design Engineer | Austin, Texas |
| SMTS Software System Design Engineer | PLYMOUTH, Minnesota |
| MTS Silicon Design Engineer | Austin, Texas |
| Sr. Software Development Engineer | Austin, Texas |
| Software Development Engineer | Austin, Texas |
| Product Manager | Austin, Texas |
| Sr. Product Development Engineer | Austin, Texas |
| Software Development Engineer | Austin, Texas |
| Sr. IT Engineer | San Jose, California |
| Silicon Design Engineer | Santa Clara, California |
| Mixed Signal Custom Layout - Temporary/Seasonal | MARKHAM, Canada |
| MTS Silicon Design Engineer | Boxborough, Massachusetts |
| Sr. Manager Product Development Engineer | Austin, Texas |
| Systems Design Engineer | Austin, Texas |
| SMTS Software Development Engineer | Austin, Texas |
| Sr. Software Development Engineer | Austin, Texas |
| MTS Silicon Design Engineer | Austin, Texas |
| MTS Silicon Design Engineer | San Jose, California |
| PMTS Software Development Engineer | San Jose, California |
| MTS Systems Design Engineer | Austin, Texas |
| MTS Silicon Design Engineer | Boxborough, Massachusetts |
| Systems Design Engineer | Austin, Texas |
| Silicon Design Engineer | Austin, Texas |
| MTS Systems Design Engineer | Austin, Texas |
| MTS Software System Design Engineer | Austin, Texas |
| Systems Design Engineer | Austin, Texas |
| Sr. Software Development Engineer | Austin, Texas |
| MTS Systems Engineer | Austin, Texas |
| Test Engineer | San Jose, California |
| Sr. Product Marketing Specialist | Austin, Texas |
| Sr. Silicon Design Engineer | Austin, Texas |
| Sr. Silicon Design Engineer | Santa Clara, California |
| PMTS Software Development Engineer | San Jose, California |
| Sr. Silicon Design Engineer | Fort Collins, Colorado |
| MTS Software Development Engineer | Santa Clara, California |
| Lead DFT Engineer | Bangalore, India |
| 2027 Analog & Mixed-Signal Design Intern | Cork, Ireland |
| Lead FPGA System Design Engineer | Hyderabad, India |
| Director of Product Marketing – PC and Graphics | Austin, Texas |
| System Thermal Design Engineer | Taipei, Taiwan |
| Analog Design Engineer | Taipei, Taiwan |
| DFT Engineer | Shanghai, China |
| DFT DV Engineer | Shanghai, China |
| DFT Engineer | Shanghai, China |
| DFT DV Engineer | Shanghai, China |
| DFT DV Engineer | Shanghai, China |
| Product Marketing Manager – Commercial Client | Austin, Texas |
| AI Platform Security Engineer | San Diego, California |
| IP-Post Silicon Validation Engineer | VANCOUVER, Canada |
| Sr. Silicon Design Engineer: Hardware-Software Co-Design | Bellevue, Washington |
| Director, Customer Program Management Data Center GPU | Bellevue, Washington |
| Product Application Engineer | Austin, Texas |
| Power Modeling Architect (CPU/GPU Accelerators) | Austin, Texas |
| Senior Technical Product Line Manager | Austin, Texas |
| IP-Post Silicon Validation Engineer | MARKHAM, Canada |
| Sr. Product Development Engineer - Product Operations | Secaucus, New Jersey |
| IP Verification Lead | Bangalore, India |
| Fellow, AI Workload Optimization | San Jose, California |
| Sales Manager, GAM Sell-Out | Belgium |
| Sr. System/Test Validation Engineer | Austin, Texas |
| Lead AI Power & Performance Engineer | Bangalore, India |
| Senior RTL Design Engineer – FPGA/ASIC Design | Hyderabad, India |
| AI Power & Performance Engineer | Bangalore, India |
| High-Speed Signal Integrity Engineer | Santa Clara, California |
| GAM Sell-Out - Sales Manager | Gurgaon, India |
| Senior Performance Analysis Engineer (CPU Architecture) | Bangalore, India |
| Senior AI/ML Software Engineer | Bangalore, India |
| DFT Engineer | Shanghai, China |
| Enterprise Territory Executive, Seattle (Telecommunications) | Seattle, Washington |
| AI Systems Validation Engineer | Secaucus, New Jersey |
| Sr. Manager Employment/ Staffing | San Jose, California |
| Senior Thermal Design Engineer | Secaucus, New Jersey |
| Senior Technical Program Manager | Secaucus, New Jersey |
| Senior Technical Program Manager | Secaucus, New Jersey |
| Sr. Engineering Technician | San Jose, California |
| Advanced Packaging Platform Lead — Yield & Data Analytics | Austin, Texas |
| At Scale Server Validation Architect - EPYC & AMD Instinct | Austin, Texas |
| Technical Program Manager – Cluster Build and Operations | Austin, Texas |
| Product Quality Engineering | Austin, Texas |
| Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization | Riyadh, Saudi Arabia |
| Lead Server Performance Verification Engineer | Bangalore, India |
| Senior CAD And Methodology Design Engineer | Penang, Malaysia |
| Systems Design Engineer - Memory Enablement | Bangalore, India |
| Post Silicon Validation Engineer | Penang, Malaysia |
| Principal Staff Post-Silicon Performance Engineer (Technical Lead) | Penang, Malaysia |
| Lead DFT Engineer (Scan Insertion | ATPG | MBIST ) | Bangalore, India |
| Lead DFT Engineer (Scan Insertion | ATPG | MBIST | JTAG) | Bangalore, India |
| Senior Test Development Engineer | Penang, Malaysia |
| Software Development Eng. | San Jose, California |
| Advanced AI Workloads - Performance and Scalability Engineer | San Jose, California |
| Assistant General Counsel, Data Center & Infrastructure Finance | Austin, Texas |
| Senior Source Control Engineer | MARKHAM, Canada |
| DFT Engineering Director, CPU Cores Design for Testability | Austin, Texas |
| Senior Embedded Firmware Lead | Santa Clara, California |
| High Speed IO (HSIO) Validation Engineer | Santa Clara, California |
| IP Silicon Validation Engineer | VANCOUVER, Canada |
| Advanced Substrate Design & Process Integration | MARKHAM, Canada |
| Advanced Substrate Design & Process Integration | Austin, Texas |
| Software Engineer, AI & Engineering Productivity Tools | MARKHAM, Canada |
| Design Verification Lead | MARKHAM, Canada |
| Digital Marketing Manager - DAM Platform Engineering | Austin, Texas |
| LEAD SOFTWARE DEVELOPMENT ENGINEER -STORAGE SOLUTIONS | Bangalore, India |
| Digital Design Engineer - Core Debug | Iasi, Romania |
| system technical leader | Shenzhen, China |
| Channel Marketing Specialist | Taipei, Taiwan |
| AI Transformation Architect – Software Verification | Hyderabad, India |
| GFX- IP Verification Lead | Bangalore, India |
| Project/ Program Manager | Taipei, Taiwan |
| AI Software Development Eng. | Shanghai, China |
| AI Framework Engineer | Shanghai, China |
| AI Framework Engineer | Shanghai, China |
| Sr. Manager Systems Design Engineer | Taipei, Taiwan |
| AI Framework and Performance Experts(vLLM) | Shanghai, China |
| Systems Design Eng.- nBIF/SysHub IPSE | Shanghai, China |
| Sr. EMIR Analysis Engineer | Bangalore, India |
| Principal Software Architect – AI-Enabled Silicon Development | Boxborough, Massachusetts |
| Product Development Engineer (Program Management) | Penang, Malaysia |
| Supply Chain Program Manager, Rack Supply | Austin, Texas |
| Systems Design Engineer | Shanghai, China |
| Director, Test Hardware Engineering & Manufacturing Enablement | Penang, Malaysia |
| Lead Software Development Engineer – BSP / Embedded Linux | Hyderabad, India |
| Finance Manager – Finance Operations & Transformation | San Jose, California |
| Senior Manager, Strategic Finance – Deal Advisory & Accounting | San Jose, California |
| Microprocessor VLSI Physical Design Engineer | Fort Collins, Colorado |
| Director, Supply Chain - Rack Planning | Austin, Texas |
| Campaign Creative Lead, Commercial Client | Austin, Texas |
| Software Development Engineer - GPU Interconnects and Ethernet AI | Santa Clara, California |
| Software Development Manager, MarTech | San Jose, California |
| Software Development Engineer - Networking | Santa Clara, California |
| Technical Program Manager, MarTech | Santa Clara, California |
| Software Engineer - Networking, firmware and C++ | Santa Clara, California |
| Principal Systems Validation Engineer | Austin, Texas |
| Sr. Program Manager, Office of the CMO | Austin, Texas |
| Global Technology Operations & Enablement Lead | Austin, Texas |
| Senior Infrastructure Engineer | MARKHAM, Canada |
| Radiation Effects & RAS Silicon Architect | San Jose, California |
| AI Scale-up Switch Network Engineer | Secaucus, New Jersey |
| Government Contract Financial Project Manager | San Jose, California |
| Technical Program Manager- AI Rack Scale Validation and Debug | Austin, Texas |
| Sr. GPU SDK Engineer. | Poland |
| Commercial Marketing Lead – Northern Europe | London, United Kingdom |
| Prod. Planner & Controler | Hsinchu, Taiwan |
| Software Development Engineer- Storage solutions on DPUs | Bangalore, India |
| Sr DFT ATPG Lead | Bangalore, India |
| ASIC RTL Design Verification Manager | Bangalore, India |
| Senior Finance & Controllership Analyst | Hyderabad, India |
| Senior PD Engineer - STA & Timing Closure | Hyderabad, India |
| Customer Operations Account Manager | San Jose, California |
| Security Firmware Architect | MARKHAM, Canada |
| Techno-Functional Systems Analyst | Austin, Texas |
| Sr. Business Planning Analyst | MARKHAM, Canada |
| P4 Compiler Engineer - DPU | Santa Clara, California |
| IP Silicon Validation Engineer | MARKHAM, Canada |
| Formal Verification Lead | Bangalore, India |
| Switch Quality Engineer | Santa Clara, California |
| Fellow Software System Design Eng. (Linux Kernel & x86 Systems Architect) | Munich, Germany |
| AI Experience Marketing Manager | Austin, Texas |
| RF Application Design Engineer | Dublin, Ireland |
| Commercial Marketing Lead - Central Europe | Munich, Germany |
| GPU Kernel Performance Engineer | Shanghai, China |
| Staff/Principal HSIO Validation Apps Engineer (SOC/IP) | Bangalore, India |
| Embedded Software - System Test Architect | Hyderabad, India |
| Embedded Software - System Test Architect | Hyderabad, India |
| GPU Kernel Development Software Engineer | Shanghai, China |
| Systems Design Engineer | MARKHAM, Canada |
| Staff UEFI/BIOS Development - Customer Application Engineer | Bangalore, India |
| Strategic Sourcing Manager | Singapore, Singapore |
| Sr. Customer Operations Account Manager | San Jose, California |
| Packaging Engineer | Bangalore, India |
| Cloud Solution Architect - Centre of Excellence, Field Application Engineering | Taipei, Taiwan |
| Sr. Product Marketing Manager, Data Center Partners | Austin, Texas |
| Cisco Business Development Sr. Manager | Austin, Texas |
| Technical Program Manager | Austin, Texas |
| Director, Sovereign AI Marketing | San Jose, California |
| Principal Software Development Engineer, GPU Primitives Libraries | CALGARY, Canada |
| Staff Engineering Technician | Austin, Texas |
| IREM Lead | Bangalore, India |
| Program System Debug Lead - Server | Austin, Texas |
| Sr. Manager, Product Management and Marketing | San Jose, California |
| DSP Systems Engineer | OTTAWA, Canada |
| Data Center GPU Board Power Validation Engineer | Austin, Texas |
| Lead Memory Systems Design Engineer | Austin, Texas |
| Solutions Architect-FPGA | San Jose, California |
| Director High Speed IO Architecture & Design | Santa Clara, California |
| Director, CPU Silicon Engineering | Fort Collins, Colorado |
| Product Line Marketing Manager | Austin, Texas |
| Software Development Engineer - GPU Libraries | San Jose, California |
| Technical Product Line Manager | Austin, Texas |
| Senior Customer Quality Engineer - Data Center Networking Products | San Jose, California |
| Full Chip Timing Lead | Hyderabad, India |
| Staff Silicon Design Engineer | Dublin, Ireland |
| DFT - SOC Lead | Bangalore, India |
| Software Engineer - CPU Performance Modeling | Iasi, Romania |
| Quality Engineer (Thermal Liquid Cooling) | Hsinchu, Taiwan |
| Technical Program Manager in EDA | Hyderabad, India |
| Lead Security firmware engineer | Bangalore, India |
| Staff Engineer - SerDes Verification | Singapore, Singapore |
| Director, Developer Integrated Marketing | Austin, Texas |
| Manager Sys/Test Validation Eng. | Austin, Texas |
| Sr. Debug Engineer - PCIe/CXL, RAS, Memory | Austin, Texas |
| Senior GPU Performance Engineer - AI Workloads | Santa Clara, California |
| Staff Server Validation Engineer | Austin, Texas |
| Director – Advanced Packaging (Panel-Scale Technologies) | Austin, Texas |
| Director Purchasing- Foundry and Advanced Packaging | Austin, Texas |
| Director Capital Markets | Austin, Texas |
| Business Development Executive | United Kingdom |
| Sr. Staff Distributed Systems Software Engineer, Collectives | Austin, Texas |
| Principal Distributed Systems Software Engineer, Collectives | San Jose, California |
| Senior Software Development Engineer | Belgrade, Serbia |
| Distributed Systems Software Engineer, Collectives | San Jose, California |
| Staff Test Engineer - Automated Test Equipment | Austin, Texas |
| Software Development Engineer - AI Workload Optimization | Austin, Texas |
| Software Development Engineer - AI Workload Optimization | Bellevue, Washington |
| Event Content Operations Manager | Santa Clara, California |
| Event Operations Lead | Santa Clara, California |
| Sr Memory PHY Enablement | Austin, Texas |
| Data Center Technician | Washington, United States |
| Staff Silicon Design Engineer | Belgrade, Serbia |
| Packaging Engineer | Hsinchu, Taiwan |
| OSAT Execution Program Manager | Hsinchu, Taiwan |
| AI Performance Modeling Engineer | Bangalore, India |
| SOC-Architect | Hyderabad, India |
| Lead Software Development Engineer - NVMe/ VirtIO/SCSI/FCP/ iSCSI/RDMA or TCP | Bangalore, India |
| Sr Software Robotics Development Engineer | Bangalore, India |
| Sr Software Robotics Development Engineer | Bangalore, India |
| Advanced SMT Process Development Engineer | Penang, Malaysia |
| Firmware Engineer-Multimedia Software | Shanghai, China |
| Project Manager, HR Strategic Projects | Austin, Texas |
| SR Design Verification Engineer | Santa Clara, California |
| Serdes Silicon Design and Micro-Architecture Engineer | San Jose, California |
| Senior Paid Search Manager | Austin, Texas |
| Chip Lead | Santa Clara, California |
| RAS Architect | Austin, Texas |
| Principal Software Commercialization Program Manager | San Jose, California |
| Software Development Engineer in Test - AI Platform | Santa Clara, California |
| System Architect – Industrial Robotics and Healthcare | Austin, Texas |
| Systems Design Engineer | Austin, Texas |
| Pre-Silicon Power Management Engineer | Austin, Texas |
| Business Development Executive, Federal Civilian | United States |
| Substrate Process & Test Technology Development | Austin, Texas |
| Channel Marketing Manager - OEM. | Austin, Texas |
| RTL Design Engineer | Austin, Texas |
| Business Development Sr. Manager | London, United Kingdom |
| Channel Marketing Manager DACH | Munich, Germany |
| CPU Core Physical Design Engineer | Cambridge, United Kingdom |
| Staff Silicon Design Engineer | Dublin, Ireland |
| RTL Design Engineer - PCIE, Ethernet, USB and DDR | Bangalore, India |
| Staff/Principal Robotics Validation Engineer | Bangalore, India |
| Lead FPGA Timing & Characterization Silicon Design Engineer | Hyderabad, India |
| Director of Debug | Seattle, Washington |
| ROCm Support SW Developer | Taipei, Taiwan |
| Principal Product Development Engineer (Program Management) | Penang, Malaysia |
| CPU Design Verification Engineer | Santa Clara, California |
| Senior Staff Component Supplier Quality Engineer | San Jose, California |
| Senior Staff Component Supplier Quality Engineer | Austin, Texas |
| Senior Component Supplier Quality Engineer | San Jose, California |
| Senior Component Supplier Quality Engineer | Austin, Texas |
| Product Development Engineer | Austin, Texas |
| Manager, Marketing Development Fund (MDF) Operations & Finance | Cyberjaya, Malaysia |
| Lead Firmware Software Engineer in Multimedia / Camera | Hyderabad, India |
| Silicon Design Engineer | Hsinchu, Taiwan |
| Sr. Corporate Counsel (Gov't Contracts & Product Compliance) | Austin, Texas |
| Lead SoC Architect | San Jose, California |
| Firmware Engineer | Austin, Texas |
| Virtualization Engineer | Santa Clara, California |
| Technical Program Manager, Microsoft Windows | Bellevue, Washington |
| Sr. Microprocessor Verification Engineer | Fishkill, New York |
| ASIC Verification Engineer, AI Networking IP | OTTAWA, Canada |
| Director, Cache RTL | Fort Collins, Colorado |
| Software Development Program Manager | Secaucus, New Jersey |
| RTL Design Engineer | MARKHAM, Canada |
| Director, Strategic Partnerships and Business Planning for AI Infrastructure | Austin, Texas |
| Senior Physical Design Engineer | Santa Clara, California |
| Regional Marketing Manager | Dublin, Ireland |
| Silicon Firmware Engineer | Austin, Texas |
| Linux Kernel Scheduler / Performance Lead | Bangalore, India |
| Sr. Manager, AI Storage Solutions | Santa Clara, California |
| Developer Relations Manager | Austin, Texas |
| Principal Program Manager | Seattle, Washington |
| Senior Signal & Power Integrity Engineer | Singapore, Singapore |
| RTL Design Engineer | Hyderabad, India |
| Silicon Design Engineer | Singapore, Singapore |
| SOFTWARE SYSTEMS DESIGNER | Bangalore, India |
| Post-Silicon Power and Performance Validation Staff Engineer | Penang, Malaysia |
| Senior Manager - System Validation | Bangalore, India |
| AI Framework Engineer | Shanghai, China |
| Senior Test Development Engineer | Penang, Malaysia |
| Channel Marketing Manager | Gurgaon, India |
| Staff Silicon Design Engineer – Physical Design | Singapore, Singapore |
| PD Power Lead | Bangalore, India |
| LEAD PLATFORM EMULATION ENGINEER | Bangalore, India |
| System/Test Validation Engineer | Hsinchu, Taiwan |
| System/Test Validation Engineer | Hsinchu, Taiwan |
| CPU Verification Engineer | Bangalore, India |
| CPU Verification Engineer - Core Enablement | Bangalore, India |
| Validation Engineer – AI & Server Platforms | Austin, Texas |
| Silicon Diagnosis DFT Engineer | San Jose, California |
| Product Development Engineering - Yield Engineer | Austin, Texas |
| Principal, Server CPU Validation Engineer | Santa Clara, California |
| Sr. Manager of Media Relations | Santa Clara, California |
| Director, Cluster Forward Deployment Engineering Data Center GPU | Santa Clara, California |
| Lead PD/ Physical design Engineer | Hyderabad, India |
| Senior Technical Program Manager – AI Agent | San Jose, California |
| Physical Design Lead | Hyderabad, India |
| Server Platform Validation Engineer | Austin, Texas |
| Lead Power Methodology Analysis Engineer | Santa Clara, California |
| Sr. Program Manager - CPU Cores | Cambridge, United Kingdom |
| Data Engineer, Marketing Analytics & AI | Austin, Texas |
| Sr. Data Analytics Manager | Austin, Texas |
| Administration & Support Coordinator | Cambridge, United Kingdom |
| System Design Engineer | Austin, Texas |
| Sr. Director, Network and Data Center Engineering, Operations & AIOps | San Jose, California |
| Senior Technical Marketing Engineer / Principal Technical Marketing Engineer | Belfast, United Kingdom |
| Sr Manager - DFT | Bangalore, India |
| AI Solution Engineer - Agentic AI | Bangalore, India |
| 2027 Student Engineer - CPU Design Verification | Iasi, Romania |
| Engineering Technician | Hsinchu, Taiwan |
| GPU Performance Engineer – AI Kernels | Helsinki, Finland |
| Vitis Technical Marketing Engineer | Belfast, United Kingdom |
| Lead AI/ML - NPU Validation Engineer | Hyderabad, India |
| AI framework Eng. | Shanghai, China |
| AI Research Scientist — Agentic AI and Foundation Models | Santa Clara, California |
| RTL Design Engineer | MARKHAM, Canada |
| Finance Manager- Internal Controls and Compliance | Austin, Texas |
| CPU Core RTL Design Engineer | Austin, Texas |
| ML Compiler Engineer | San Jose, California |
| ASIC Design Engineer, PCIe IP Enablement | MARKHAM, Canada |
| CPU Cache Architect | Fort Collins, Colorado |
| CPU Cache Architect | Fort Collins, Colorado |
| PLL Design/ Integration Sr Staff Engineer | San Jose, California |
| Core RTL/Microarchitecture Power Lead | Santa Clara, California |
| Senior Applications Engineer – AI & HPC, University Programs | Dublin, Ireland |
| Business Development Sr. Manager | Austin, Texas |
| Interconnect Micro-Architect and Design Development Lead | Austin, Texas |
| Lead Physical Design Engineer | Bangalore, India |
| Sr. Data Center Technician | Milan, Italy |
| Lead Silicon Design Engineer | Hyderabad, India |
| SENIOR STAFF SILICON DESIGN ENGINEER | Cork, Ireland |
| Facilities Manager | Singapore, Singapore |
| AI Solution Architect | San Jose, California |
| Campaign Creative Lead, Consumer | Austin, Texas |
| Staff Finance Analyst, Global Operations | Austin, Texas |
| Finance Manager, Global Operations | Austin, Texas |
| Principal Software Development Engineer | San Jose, California |
| Program Manager Product Infrastructure Engineering | Austin, Texas |
| Sr. Staff Physical Design Engineer | VANCOUVER, Canada |
| Senior Graphics Machine Learning Engineer | Munich, Germany |
| Senior Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization | Riyadh, Saudi Arabia |
| Sr. Customer Support - Account Support Spec. | Dublin, Ireland |
| Talent Acquisition Operations Specialist – EMEA | Dublin, Ireland |
| Staff Supply Chain Specialist | Singapore, Singapore |
| Sys/Test Validation Eng. | Shanghai, China |
| Engineering Technician | Hsinchu, Taiwan |
| Engineering Technician | Hsinchu, Taiwan |
| Engineering Technician | Hsinchu, Taiwan |
| Packaging Engineer, Substrate | Hsinchu, Taiwan |
| Senior Commercial Sales Account Executive – Enterprise Acquisition | Seoul, Korea, South |
| Manager Industrial Engineering | Hsinchu, Taiwan |
| Senior Manager IT Storage Engineering | San Jose, California |
| Sr. Solutions Engineer | Santa Clara, California |
| Silicon Design Engineer (1 year contract) | MARKHAM, Canada |
| Systems Design Engineer | VANCOUVER, Canada |
| Lead Systems Engineer, Enterprise AI Server Platform Validation | Austin, Texas |
| Sr. Director Payroll | Austin, Texas |
| Validation Lead-Fuse/SoC | MARKHAM, Canada |
| Staff Package Design Engineer | Penang, Malaysia |
| Staff Package Design Engineer | Penang, Malaysia |
| AI Engineer (Software Development Engineer) | Singapore, Singapore |
| RTL Design Engineer | Hyderabad, India |
| Program Manager - CPU Team | Bangalore, India |
| Analog IP Circuit Lead Engineer | Hyderabad, India |
| Paralegal, Real Estate | Austin, Texas |
| Rack and Chassis Design Mechanical Engineer (Server, Server Infrastructure) | Austin, Texas |
| Mechanical Engineer, AI Computing Hardware (Servers, Rack-Level Systems) | Secaucus, New Jersey |
| DFT Architect Lead | Bangalore, India |
| Sr. Product Development Engineer | Secaucus, New Jersey |
| SoC Data Path Engineer | MARKHAM, Canada |
| Senior Compiler Software Development Engineer | San Jose, California |
| GPU Boards Failure Analysis Engineer | Austin, Texas |
| Technical Program Manager-Post Silicon Development | San Jose, California |
| Sr. BKC Release Manager - Data Center GPU | Austin, Texas |
| GPU Design Verification Engineer | MARKHAM, Canada |
| Director, Client Business Development | Austin, Texas |
| Learning and Development Training Program Manager | Secaucus, New Jersey |
| LEAD - ABL Memory Firmware Engineer | Bangalore, India |
| Solutions Architect, Global Systems Integrators (GSI) | New York, United States |
| Lead Software Engineer - AI/ML (C#,C++, Sql - Debug Tools) | Bangalore, India |
| Channel Marketing Manager - Contract | Cyberjaya, Malaysia |
| Sr. Solutions Engineer | Austin, Texas |
| RTL Methodology Silicon Design Engineer | Austin, Texas |
| Firmware Engineering Manager | MARKHAM, Canada |
| Lead Hardware Systems Design Engineer | Secaucus, New Jersey |
| Staff Software Development Engineer - Yocto / Embedded Linux | Hyderabad, India |
| Staff Software Development Engineer - OpenBMC / Platform Management | Hyderabad, India |
| SoC Physical Integration Engineer | San Jose, California |
| Sr. Manager, Product Management | Santa Clara, California |
| Sr. Software Engineer – Kernel & Device Drivers (Temp 1 Year Contract) | MARKHAM, Canada |
| Test Lead/Architect - Out of Band - Client/Server Manageability With AI | Bangalore, India |
| SerDes Silicon Design and Micro-Architecture Engineer | San Jose, California |
| PD PNR Engineer | Bangalore, India |
| PD PNR Engineer | Bangalore, India |
| Pricing Strategy Manager | Austin, Texas |
| Technical Program Manager | Shanghai, China |
| Product Development Eng. | Hsinchu, Taiwan |
| Manager, OSAT Procurement (people manager role) | Hsinchu, Taiwan |
| Senior Firmware Engineer | Singapore, Singapore |
| Low-Power & CDC Verification Engineer | Santa Clara, California |
| Software Development Engineer | Taipei, Taiwan |
| Senior Automotive System Architect | WIXOM, Michigan |
| Cores Systems Validation Engineer | Austin, Texas |
| Packaging Design Engineer | Austin, Texas |
| Principal Competitive Analysis, Custom Silicon Architect - DC GPU | San Jose, California |
| Principal Infrastructure Lead | Austin, Texas |
| Returns Center Operations Manager | Austin, Texas |
| Data Engineer, Marketing Analytics & AI | Santa Clara, California |
| Staff Server Platform Hardware Architecture | Bangalore, India |
| Principal Solutions Architect, Global Systems Integrators (GSI) | Texas, United States |
| Telco Go-To-Market Manager | Austin, Texas |
| Software Design Engineer - GPU Kernel Optimization | San Jose, California |
| Senior GPU Kernel Development Engineer | San Jose, California |
| Senior Software Development Engineer | Belgrade, Serbia |
| Junior Business Planning Specialist - Supply Chain Forecasting | Singapore, Singapore |
| Embedded Software - System Test Architect | Hyderabad, India |
| Open BMC - System Test Architect | Hyderabad, India |
| System Validation Engineer – Data Center GPU | MARKHAM, Canada |
| Product Manager, Semi-Custom | Austin, Texas |
| Principal Infrastructure Architect | Austin, Texas |
| Staff Silicon Design Engineer | Penicuik, United Kingdom |
| DevOps Platform Engineer | Hyderabad, India |
| University Relations Recruiter (Contract) | Austin, Texas |
| Lead HPC & AI Infrastructure Architect | San Jose, California |
| Senior/Lead Robotics Validation Engineer | Bangalore, India |
| STA Engineer - EDA/CAD Flow : Software Development Engineer | Hyderabad, India |
| Linux Kernel Test Engineer - BareMetal and virtualization | Bangalore, India |
| Hardware Development Eng. | Taipei, Taiwan |
| Senior Staff System Debug Engineer | Penang, Malaysia |
| Platform Validation Engineer - GPU | Penang, Malaysia |
| Platform Validation Engineer - RAS | Penang, Malaysia |
| Staff Software Development Engineer | Penang, Malaysia |
| Principal Mechanical Engineer | San Jose, California |
| Sr. Manager Packaging Engineering | Austin, Texas |
| Sr. Manager Packaging Engineering | Santa Clara, California |
| Data Center Infrastructure Architect | Austin, Texas |
| EMIR Engineer | Santa Clara, California |
| Lead Board Hardware Development Engineer | San Jose, California |
| ML Systems Research Engineer, RL / Inference / Agent Systems | Santa Clara, California |
| CPU Core Design Verification Engineer | Boxborough, Massachusetts |
| SENIOR ARCHITECT SOFTWARE DEVELOPMENT ENGINEER | Bangalore, India |
| Systems Design Engineer | Taipei, Taiwan |
| DFT Integration Lead | Bangalore, India |
| 2026 Graduate Trainee - Financial Accountant (December Intake) | Cyberjaya, Malaysia |
| Power Solution Engineer | Shenzhen, China |
| Component Sales Account Manager | Shenzhen, China |
| 2026 Graduate Trainee - Financial Accountant (December Intake) | Penang, Malaysia |
| 2026 Graduate Trainee - Silicon Design Engineer (December Intake) | Penang, Malaysia |
| Sr. Manager, Memory Partnership Product Management – Data Center Solutions | Santa Clara, California |
| Sr. Manager, Data Center Power and Thermal , Partner Management – Data Center Solutions Product Management | Santa Clara, California |
| Sr. Manager, Storage Partner Management, Data Center Solutions Product Management | San Jose, California |
| Product Marketing Manager - Cloud Infrastructure | Santa Clara, California |
| Principal Mechanical Design Engineer (Server, GPU) | Austin, Texas |
| Sr. Technical Program Manager, Hardware Engineering | Austin, Texas |
| Staff HR Compliance Specialist (SEA & Australia) | Singapore, Singapore |
| Senior AI Model Quantization Engineer | Beijing, China |
| Senior ASIC RTL Design Engineer, AI Networking IP | OTTAWA, Canada |
| Memory PHY Principal Design Engineer | Santa Clara, California |
| Senior Staff Product Application Engineer-Memory Subsystems | San Jose, California |
| Senior Embedded Firmware Validation Engineer | San Jose, California |
| Lead Formal Verification Engineer | Austin, Texas |
| Sr. Manager Packaging Engineering | MARKHAM, Canada |
| Business Development Manager | Austin, Texas |
| Senior Event Operations Lead | Santa Clara, California |
| Director, Industry Events | Santa Clara, California |
| Senior Data Science Manager | Santa Clara, California |
| Sr. Event Technology Operations Manager | Santa Clara, California |
| Sr. Industry Event Manager | Santa Clara, California |
| Director, Proprietary Events | Santa Clara, California |
| CPU Power & Performance Validation Engineer | Folsom, California |
| Senior Rendering Development Engineer. | Gdansk, Poland |
| Infrastructure Firmware Engineer | Nis, Serbia |
| Infrastructure Firmware / DevOps engineer | Nis, Serbia |
| Fellow, Server System Memory Validation Lead | Austin, Texas |
| Technical Marketing Engineer – FPGA Design | Belfast, United Kingdom |
| Sr. Manager - RTL Design Manager | MARKHAM, Canada |
| Staff RAS Validation Engineer | Bangalore, India |
| Staff/Principal Automative Use Cases Validation Engineer | Bangalore, India |
| Sr. Manager Physical Design Engineering | Bangalore, India |
| ASIC Physical design Lead | Hyderabad, India |
| Compiler Performance Engineer | Poland |
| Software Development Eng --OPTEE/c/U Boot | Hyderabad, India |
| Linux Driver Development--RTOS/Zephyr | Hyderabad, India |
| Linux Driver Development--RTOS/Zephyr | Hyderabad, India |
| Commercial Sales Rep (2026 NCG) | Shanghai, China |
| Prod. Planning & Control Manager | Hsinchu, Taiwan |
| Test Engineering Manager | Penang, Malaysia |
| Senior Firmware Engineer | MARKHAM, Canada |
| Data Center Structural Test Solutions Architect | Austin, Texas |
| Senior IC Layout design Engineer | San Jose, California |
| Principal Solutions Engineering – AI server/rack Infrastructure | Seattle, Washington |
| Senior Hardware Systems Program Manager | Austin, Texas |
| Sr. Director of Packaging Engineering | San Jose, California |
| CPU Performance Modelling Architect | Cambridge, United Kingdom |
| AI Performance Engineer (Life Sciences) | Helsinki, Finland |
| IP Design Lead - Sr Staff | Bangalore, India |
| System Test Engineer (Datacenter/AI Server board) | Hsinchu, Taiwan |
| Silicon Design Engineer | Hsinchu, Taiwan |
| Junior Agentic AI Software Development Engineer | Singapore, Singapore |
| Senior Supply Chain Specialist | Penang, Malaysia |
| STA Engineer - EDA/CAD Flow : Software Development Engineer | Hyderabad, India |
| Physical Design Lead with STA | Hyderabad, India |
| Full Chip Timing Lead | Hyderabad, India |
| Lead DFT Engineer | Hyderabad, India |
| Lead DFT Engineer | Hyderabad, India |
| Physical design architecture | Bangalore, India |
| Senior Systems Design Engineer | Taipei, Taiwan |
| Regional HR Compliance Operations Manager | Singapore, Singapore |
| Senior Analyst - ServiceNow & IT Service Management | Penang, Malaysia |
| Systems Validation Engineer - Data Center GPU | MARKHAM, Canada |
| Principal ASIC Design Engineer | MARKHAM, Canada |
| BIOS Firmware Architect | Austin, Texas |
| Lead Embedded Firmware Architect | Austin, Texas |
| Test Engineer | San Jose, California |
| Manufacturing Quality Process Program Manager | Austin, Texas |
| Principal Validation Architect - Data Center GPU | Austin, Texas |
| Senior Product Line Manager – Custom FPGA & Adaptive SoC Products | San Jose, California |
| Manager - CPU Library Optimizations | Bangalore, India |
| Cores Verification Lead | ONTARIO-HOME OFFICE, Canada |
| Sr. FPGA Engineer - Vivado | Belfast, United Kingdom |
| Product Application Engineer - Embedded x86 | Dublin, Ireland |
| SoC Physical Design Implementation Lead | MARKHAM, Canada |
| Lead GPU SDK Engineer (Data Analysis & Frame Timing Focus). | Gdansk, Poland |
| Strategic Sourcing Manager- Foundry and Advanced Packaging | Austin, Texas |
| Power Methodology and Modelling Engineer | Santa Clara, California |
| Lead Power Analysis Engineer | Hyderabad, India |
| Physical Design Lead with STA | Hyderabad, India |
| LEC/CLP Engineer | Hyderabad, India |
| Synthesis STA silicon design Engineer | Hyderabad, India |
| Timing Constraint Development Engineer | Hyderabad, India |
| System Test and Automation Architect | Bangalore, India |
| Sr. Corp. Counsel Legal - Ethics & Compliance | Penang, Malaysia |
| Storage & Virtualization Engineer | Austin, Texas |
| Senior Vendor Technology Program Manager - Optics | MARKHAM, Canada |
| Sr. Product Development Engineer | Secaucus, New Jersey |
| Sr. Product Development Engineer | Secaucus, New Jersey |
| Sr. Product Development Engineer | Secaucus, New Jersey |
| Lead Software Development Engineer | Secaucus, New Jersey |
| AI Systems Performance Engineer | Austin, Texas |
| Senior AI Systems Performance Engineer | Austin, Texas |
| SerDes Application Design Expert | San Jose, California |
| Sales and Use Tax Senior Analyst | Austin, Texas |
| STA - CAD Engineer | Austin, Texas |
| Sr. Product Development Engineer | Austin, Texas |
| Product Marketing Manager | Seattle, Washington |
| Senior Signal Integrity Engineer | Singapore, Singapore |
| CPU Architecture and RTL Design Engineer | Dublin, Ireland |
| Data Center GPU and AI Embedded Firmware Architect | Austin, Texas |
| Senior Manager, Soc Power Modeling | Austin, Texas |
| Sr. Debug Engineer - PCIe/CXL, RAS, Memory | Santa Clara, California |
| Senior Network Engineer, Data Center and Campus Networking | San Jose, California |
| Data Center Facility Thermal Design Engineer | Austin, Texas |
| Lead Systems Debug Engineer | Bellevue, Washington |
| GPU Distributed System Researcher | Bellevue, Washington |
| DFT/DFx Architecture & RTL Lead | Santa Clara, California |
| Sr. Fellow - Software Architect - EDA Software Development | San Jose, California |
| Data Center Engineer | Austin, Texas |
| PNR CAD SILICON DESIGN ENGINEER | Hyderabad, India |
| PNR CAD DESIGN ENGINEER | Hyderabad, India |
| Senior GPU Performance Software Engineer | Austin, Texas |
| Standard Cell Design Enablement Lead | MARKHAM, Canada |
| Principal, Platform Thermal Engineer Lead | Santa Clara, California |
| Senior Software Engineer - GPU Profiling Tools | MARKHAM, Canada |
| Engineering Placement Intern - 2027/2028 | Belfast, United Kingdom |
| Sr. STAFF/STAFF SILICON DESIGN ENGINEER (PCIe) | Cork, Ireland |
| Sr. Technical Program Manager- CPU Cores | Fishkill, New York |
| Physical Design Lead - CPU Team | Bangalore, India |
| Director -AI Driven Silicon Design | Fishkill, New York |
| Sr. Product Marketing Manager | Seattle, Washington |
| Senior Linux Kernel Engineer (Networking) | Cambridge, United Kingdom |
| Sr AI/ML Compiler Engineer | Hyderabad, India |
| ASIC Physical Design & Implementation Lead | Bangalore, India |
| Senior Manager (Thermal Solution Manufacturing) | Singapore, Singapore |
| Physical Design Lead(High Speed IP's) | Bangalore, India |
| ATE Product Development Engineer | Singapore, Singapore |
| Lead System Development Engineer | Hyderabad, India |
| CPU Post Si Validation Engineer(Power and Performance) | Bangalore, India |
| Sr. Silicon Design Engineer | Bangalore, India |
| Lead Engineer- Behind-the-Meter Power Infrastructure | San Jose, California |
| Principal Memory Subsystem Architect | GEORGIA, Georgia |
| Platform Engineer | San Jose, California |
| Staff Product Applications Engineer-Silicon Debug & Embedded Systems | San Jose, California |
| Compiler Software Development Engineer | San Jose, California |
| SerDes Validation engineer | San Jose, California |
| Sr DFT/ATPG Engineer–Mixed-Signal IP | Fort Collins, Colorado |
| Data Scientist (Sales Operations) | Austin, Texas |
| PD PNR Engineer | Bangalore, India |
| Sr. Product Development Engineer | Austin, Texas |
| Sr. Director, U.S. Public Sector Sales | Virginia, United States |
| Post Silicon High-Speed I/O Validation Engineer | Austin, Texas |
| Data Center and Infrastructure Technical Program Manager | Austin, Texas |
| Lead STA / Timing analysis Design Engineer | Bangalore, India |
| Partner Manager - Supermicro | Tokyo, Japan |
| Firmware/Bios Validation Manager - Automation with AI | Bangalore, India |
| Finance Manager - Automation & Operations | Cyberjaya, Malaysia |
| Senior Manager, Product Development Engineering (NPI) | Singapore, Singapore |
| Senior AI/ML Solutions Engineer | Santa Clara, California |
| Staff Silicon Design Engineer | Boxborough, Massachusetts |
| Platform Validation Lead - IO Interfaces | Austin, Texas |
| Sales Manager, Commercial Client Sell-Out (Dell Account Team) – North America | Austin, Texas |
| Sr Director Product Marketing – Data Center GPU | Santa Clara, California |
| Manager, SOC Product & Test Engineering | Austin, Texas |
| Lead Full Chip Floorplan Design Engineer | Bangalore, India |
| Sr. Director of Engineering, Data Center Infrastructure | Seattle, Washington |
| Staff DFx Methodology Architect | San Jose, California |
| Staff C++ Software Engineer | Yerevan, Armenia |
| Linux Driver Development--RTOS/Zephyr | Hyderabad, India |
| IP/Subsystem Verification Lead | Hyderabad, India |
| Infrastructure Systems Engineer | Penang, Malaysia |
| Infrastructure Platform Engineer | Penang, Malaysia |
| Lead Verification Engineer | Hyderabad, India |
| SOFTWARE DEVELOPMENT ENGINEER -- OP-TEE/C/U-BOOT | Hyderabad, India |
| Quality Systems Engineer – AI Transformation | Austin, Texas |
| Quality Systems Engineer – AI Transformation | San Jose, California |
| STA/Constraints Engineer | VANCOUVER, Canada |
| 3D IC and SoC CAD ENGINEER | Austin, Texas |
| Firmware Architect - Confidential Compute | Austin, Texas |
| Senior Manager, Total Rewards Strategy & Portfolio Management | Austin, Texas |
| Lead Physical Design Engineer, Place & Route | MARKHAM, Canada |
| Memory/SSD Engineer | Shenzhen, China |
| Systems Engineer - PC/Laptop | Shenzhen, China |
| Soc Validation Engineer | Hyderabad, India |
| Lead DFT Engineer | Hyderabad, India |
| Lead DFT DV Engineer | Hyderabad, India |
| Analog/Mixed-Signal SerDes Design Engineer | San Jose, California |
| TMS Solution Architect | Austin, Texas |
| Systems Applications Engineer | Austin, Texas |
| Product Marketing Manager- AI Software & Ecosystem (ROCm) | Austin, Texas |
| Rack Cost Manager | Austin, Texas |
| Triton Compiler and Kernel Software Engineer | San Jose, California |
| Post-Silicon Memory Subsystem Validation Engineer | Austin, Texas |
| Software System Design Engineer | Austin, Texas |
| Staff Graphics Architecture Engineer | Austin, Texas |
| Design Verification Engineer | Iasi, Romania |
| Sr. Software System Designer | Belgrade, Serbia |
| Product Application Engineer - FPGA/Emulation & ACAP Compilation Tools | Hyderabad, India |
| Product Marketing Manager | Shanghai, China |
| ASIC/SoC Program Manager | Bangalore, India |
| Prinicipal Signal Integrity Engineer | San Jose, California |
| Supply Chain Manager | Austin, Texas |
| System Modeling Design Engineer | San Jose, California |
| Senior Data Center Technician Lead | Arizona, United States |
| Platform System Architect | Austin, Texas |
| DFT / ATPG Test Development Engineer | Austin, Texas |
| SoC Lead Engineer – LEC & Low Power Signoff | MARKHAM, Canada |
| CPU/Cores Post‑Silicon Validation (Security) | Bangalore, India |
| Sr. Business Planning Specialist | San Jose, California |
| Senior Full chip EM/IR analysis Engineer | Hyderabad, India |
| Staff Digital Design Engineer | Penicuik, United Kingdom |
| Silicon Design Engineer | MARKHAM, Canada |
| RTL/Firmware Design Engineer | MARKHAM, Canada |
| Senior Software Automation Engineer | Cambridge, United Kingdom |
| Staff Software Automation Engineer | Cambridge, United Kingdom |
| Firmware Engineer | VANCOUVER, Canada |
| Lead Full-chip STA and timing signoff Engineer | Bangalore, India |
| SOC Debug tools validation Engineer | Bangalore, India |
| PD Clocking Engineer | Bangalore, India |
| CPU/Cores Post Silicon Validation (Functional) | Bangalore, India |
| Senior Manager, Product Development | Singapore, Singapore |
| Physical Design Engineer | MARKHAM, Canada |
| RTL Design Engineer | MARKHAM, Canada |
| Sr. Corporate Counsel Legal- Graphics & Engineering | Austin, Texas |
| Principal Engineer, Efficient GenAI | San Jose, California |
| Program Manager – Value Added Services | San Jose, California |
| Program Manager – Value Added Services | Austin, Texas |
| Server Platform Debug Program Lead | Austin, Texas |
| 2026 Graduate Trainee - Product Development Engineer Signal Integrity (December Intake) | Penang, Malaysia |
| Strategic Transaction Paralegal | Santa Clara, California |
| Principal Signal Integrity Engineer (SI/PI) | San Jose, California |
| Partner Marketing Manager, Google and Oracle | Santa Clara, California |
| Customer Operations Account Manager | Austin, Texas |
| Sr. RTL Design Engineer | San Jose, California |
| Static Timing Analysis / Full Chip Timing Engineer | MARKHAM, Canada |
| Strategic Sourcing Manager | Secaucus, New Jersey |
| Lead IP Verification Engineer | San Jose, California |
| RTL Design Manager | San Jose, California |
| Systems Design Engineer - dGPU / CPU Software Feature Enablement | MARKHAM, Canada |
| FPGA Design and Prototyping Engineer | San Jose, California |
| Senior Post Silicon Validation Engineer (Characterization) | Penang, Malaysia |
| Senior Manufacturing Integration Engineer (OSAT & NPI) | Penang, Malaysia |
| Senior Product Development Engineer (SLT) | Singapore, Singapore |
| Senior Product Development Manager (ATE) | Singapore, Singapore |
| Product Development Manager (ATE) | SINGAPORE, Singapore |
| Staff Customer System Debug Engineer | Penang, Malaysia |
| Principal SoC Architect | San Jose, California |
| Physical Design Engineer | MARKHAM, Canada |
| Power Analysis and Optimization Engineer | Austin, Texas |
| Sr Silicon Design Verification Engineer | Austin, Texas |
| Technical Fellow - High-Speed Interconnect & Optics | Santa Clara, California |
| Staff Software Development Engineer: GPU, AI/ML Ops & Quality Engineering | Santa Clara, California |
| Sr. Engineer, Power Systems Design - Data Center GPU | Austin, Texas |
| AI / ML DFT Project Lead | Santa Clara, California |
| CPU Microarchitecture & Cache RTL Design Engineer | Fort Collins, Colorado |
| Lead Verification Engineer - PCIE/CXL | Bangalore, India |
| Linux Kernel Development engineer - Perf, PMU, Core, Cache, Fabric and Virtualization | Bangalore, India |
| Senior Post Silicon Validation Engineer (PCIe / HSIO) | Penang, Malaysia |
| Senior SLT Engineer | Singapore, Singapore |
| Manager, Product Engineering | Hsinchu, Taiwan |
| Sr. Counsel, M&A | Santa Clara, California |
| Software Development Engineer (Chip Product Security) | MARKHAM, Canada |
| Director, Corporate and Securities Counsel | Santa Clara, California |
| Principal Memory Sub-System Validation Lead | Santa Clara, California |
| Sr Salesforce Service Cloud Developer | San Jose, California |
| NPU Compiler Engineer | San Jose, California |
| PD Leadership role | Bangalore, India |
| Lead Design Verification Engineer-Memory Controller | San Jose, California |
| Senior Staff Pre Silicon Verification Engineer | San Jose, California |
| Senior Manager, Supply Planning | Austin, Texas |
| Advanced Packaging Technologist (Mechanical Modeling) | Austin, Texas |
| Advanced Package Thermal Technologist | Austin, Texas |
| Fin Tech GTM Enablement - Financial Services Sr. Manager | Austin, Texas |
| RTL Design Engineer – Power Design | Austin, Texas |
| CPU Architecture and RTL Design Engineer | Dublin, Ireland |
| Lead Physical Design Engineer | Santa Clara, California |
| DFT Pattern | Bangalore, India |
| FPGA Prototyping Engineer | Hyderabad, India |
| RTL Design Engineer | Hyderabad, India |
| DFT Timing Lead | Bangalore, India |
| DFT - ATPG | Bangalore, India |
| 2027 China Spring Intern (Jan - Jun) | Shanghai, China |
| System Design Leader or Architect | Shanghai, China |
| Software Solutions Engineer | Austin, Texas |
| Processor Design Engineer | Fishkill, New York |
| Sr. Corporate Counsel (Data Center Solutions) | Austin, Texas |
| Staff/Principal Functional Verification Engineer (Memory Subsystem) | Hyderabad, India |
| Senior Analyst - APM & IT Service Management | Hyderabad, India |
| ASIC Front-End Methodology Engineer | Hyderabad, India |
| Staff Product Development Engineer | Penang, Malaysia |
| Sr. Product Development Engineer | Austin, Texas |
| Senior Software Engineer, Memory Diagnostics | Singapore, Singapore |
| Senior Technical Program Manager - AIG SW TPM | San Jose, California |
| Next Gen CPU Power Management RTL Design Engineer | Santa Clara, California |
| Principal Competitive CPU Microarchitecture & Platform Performance Engineer | Texas, United States |
| Principal Competitive CPU Performance Forecaster & Data Scientist | Texas, United States |
| Principal Enterprise & Database Competitive Performance Engineer | Texas, United States |
| Sr Director, Data Center Partner Marketing - OEM, Cloud & ISV | Austin, Texas |
| Director, Government Relations (MY/SEA) | Penang, Malaysia |
| Senior Functional Verification Engineer (Memory Subsystem) | Hyderabad, India |
| FPGA/RTL Design Engineering Manager with High-Speed Protocols (HSIO) (PCIE/Ethernet/USB) | Hyderabad, India |
| Sensor Platform Engineer | Shanghai, China |
| Staff Physical Design Engineer | Penang, Malaysia |
| CVP, Product Management – Data Center GPU | Santa Clara, California |
| Senior Manager - Analog Design | Santa Clara, California |
| Power IP and System Validation Engineer | Austin, Texas |
| Automation Lead - GUI Test Framework Lead | Bangalore, India |
| Embedded Product Application Engineer | Hyderabad, India |
| Senior RTL Silicon Design & Validation Engineer | Hyderabad, India |
| Server BIOS Engineer | Taipei, Taiwan |
| Data Center System Interconnect Engineer | Austin, Texas |
| Technical Marketing Specialist (1 year contract) | MARKHAM, Canada |
| Short Term 2027 Technical Marketing - Performance Analysis Intern/Co-Op | MARKHAM, Canada |
| Lead Embedded Software Development Engineer | Dublin, Ireland |
| Lead Performance Modeling Engineer – GPU SoC | Bangalore, India |
| Sr. Manager Systems Design Eng. | Shenzhen, China |
| Printed Circuit Board PCB Design and Layout Engineer | MARKHAM, Canada |
| Test Engineer | Shanghai, China |
| Sr. Supply Chain Specialist | Hsinchu, Taiwan |
| System Power Delivery Architect | MARKHAM, Canada |
| Sr. Manager, Trade Facilitation (IC) | Austin, Texas |
| CPU RTL Power, Clocking, Reset Design Engineer | Fort Collins, Colorado |
| Senior Manager, AI Field Applications Engineering - EMEA | Munich, Germany |
| Senior Field Application Engineer - HPC (UK + Multiple European Locations) | London, United Kingdom |
| Senior RTL Design Engineer with Memory controllers | Hyderabad, India |
| Physical Design Lead with STA | Hyderabad, India |
| Senior Financial Accountant | Cyberjaya, Malaysia |
| Server Platform Debug Engineer (RAS Focus) | Taipei, Taiwan |
| Finance Manager - Funding Governance & Compliance | Cyberjaya, Malaysia |
| Senior Staff Burn-In System Product Developer | Singapore, Singapore |
| Strategic Sourcing Manager- Foundry and Advanced Packaging | San Jose, California |
| RTL / Circuit IP Design Engineer | San Jose, California |
| Principal Security Lead Engineer | Santa Clara, California |
| Engineering Lab Supervisor, Server Systems | Secaucus, New Jersey |
| Customer Account Support Specialist | Singapore, Singapore |
| Product Development Engineer -Agentic AI & Analytics | Singapore, Singapore |
| Senior Product Development Engineer - Yield & Data Analytics | Singapore, Singapore |
| Lead Server Systems Debug Engineer | Austin, Texas |
| SerDes RTL Design Engineer | San Jose, California |
| Principal Cloud & AI Workload Performance Analysis Engineer | Texas, United States |
| Compute and Enterprise AI Engineering Operations Leader | Austin, Texas |
| Silicon Design Engineer - Technical Lead | MARKHAM, Canada |
| Government Contract Program Manager (Customer Facing) | Washington, United States |
| Fellow ROCm GPU Libraries | Oregon, United States |
| Linux Kernel & Virtualization SW Engineer | Austin, Texas |
| Sr. Design Verification Engineer | Santa Clara, California |
| GPU Software Engineer - GPU Libraries | California, United States |
| CPU Core Staff DFT Engineer | Santa Clara, California |
| Data Center Test Solutions Architect | Austin, Texas |
| CPU Performance Engineer | MARKHAM, Canada |
| Product Application Engineer - Networking | Bangalore, India |
| Partner Manager - Supermicro | Munich, Germany |
| Hardware-Software Integration & Verification Engineer | Hyderabad, India |
| SoC Design Lead, Microarchitecture and Design Methodology | MARKHAM, Canada |
| Failure Analysis Engineer - Server Systems Integration | Secaucus, New Jersey |
| Sr. Manager CPU Verification | Bangalore, India |
| Failure Analysis Engineer - Server PCBA Design - Power | Secaucus, New Jersey |
| Emulation Verification Engineer | Austin, Texas |
| Sr. Data Center GPU Validation and Debug Engineer | Austin, Texas |
| AI Design Automation Engineer | San Jose, California |
| ASIC Emulation Engineer | Santa Clara, California |
| Software Development Engineer — GPU Fleet Management & AI Infrastructure | San Jose, California |
| AI Systems Engineer – AI Model (Training & Inference) | MARKHAM, Canada |
| HPC & AI Research Engineer / Software Engineer | Santa Clara, California |
| Senior Staff Silicon Design Engineer (Emulation) | Penang, Malaysia |
| Linux Kernel & Virtualization Manager — Memory Management, QA, Scheduler, Power Management | Bangalore, India |
| Manager, Silicon Diagnostics & Validation | Singapore, Singapore |
| Sr. ML Compilation Engineer | San Jose, California |
| Sr Solutions Engineer-FPGA/PCIe | San Jose, California |
| Silicon Design Verification Engineer | MARKHAM, Canada |
| Principal AI Cluster Performance Validation Engineer | Austin, Texas |
| GPU Performance Architect | Santa Clara, California |
| Sr. Product Security Incident Response Engineer | Austin, Texas |
| ATE Test Engineer | Austin, Texas |
| Senior RTL Silicon Design & Validation Engineer | Hyderabad, India |
| Sr. Director, Commercial Sales | Tokyo, Japan |
| Firmware Engineer - Power Management | Shanghai, China |
| Sr Software Engineer - Developer & Build Experience (Gradle, Compiler with C/C++) | Hyderabad, India |
| HPC Systems Engineer - AI Workloads | San Jose, California |
| Kernel / Linux Development Engineer | Austin, Texas |
| Sr. Data Center GPU Firmware Engineer | Austin, Texas |
| Senior Hardware Design Engineer | Secaucus, New Jersey |
| Principal Software Development Engineer | Santa Clara, California |
| Memory PHY Firmware Architect | Santa Clara, California |
| Senior Manager Physical Design Engineer | Cambridge, United Kingdom |
| Senior Firmware Engineer | Nis, Serbia |
| SOC Physical Design Lead | Hyderabad, India |
| Physical Design Lead | Hyderabad, India |
| Sr. Product Development Engineer | Miao-Li, Taiwan |
| Wireless Datapath Validation Engineer | Bangalore, India |
| Supplier Quality Engineer | Hsinchu, Taiwan |
| Senior Staff Front End Automation Engineer | Penang, Malaysia |
| Packaging Engineer | Suzhou, China |
| GPU Performance Architect | Austin, Texas |
| Lead Pre-Silicon Verification & Post-Silicon Validation Architect | Austin, Texas |
| Senior Staff Advance Packaging Designer | Singapore, Singapore |
| Sr. Staff ASIC Design Engineer | San Jose, California |
| Product Quality & Reliability Engineer | Austin, Texas |
| Field Applications Engineer, AI Infrastructure | Austin, Texas |
| Senior Product Application Engineer | San Jose, California |
| Senior SoC Lead Engineer-ASIC | San Jose, California |
| Mechanical Engineer | San Jose, California |
| GPU Kernel Development Engineer - Fellow | Austin, Texas |
| 2027 Term 1 Internship – Advanced Packaging Optical Characterization Intern | Singapore, Singapore |
| Technical Project Manager - Data Center Deployment | Texas, United States |
| Senior Cloud Solutions Architect | United Kingdom |
| Principal Systems Validation Engineer – Data Center GPU System Stress | MARKHAM, Canada |
| Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op | MARKHAM, Canada |
| Lead Senior Engineer - Developer & Build Experience (Gradle, Compiler with C/C++) | Hyderabad, India |
| FCT PD lead | Bangalore, India |
| Staff Post Silicon Validation Engineer | Penang, Malaysia |
| Senior FPGA IP Design engineer | Hyderabad, India |
| FPGA Prototyping Lead | Hyderabad, India |
| Product Planner & Controler | Hsinchu, Taiwan |
| Interconnect Performance Engineer | Austin, Texas |
| Senior Network Systems Engineer | Austin, Texas |
| Senior Datacenter Platform/Debug Engineer | Austin, Texas |
| Senior Staff Physical Design Engineer (CORES) | Cork, Ireland |
| GPU Runtime and System Software Engineer - Fellow | San Jose, California |
| Data Center Engineer | Texas, United States |
| Summer 2027 Long Term ASIC Verification Engineering Intern/ Co-Op | OTTAWA, Canada |
| Fellow Software Development Engineer, GEMM Optimization | San Jose, California |
| DFT Engineer | Hyderabad, India |
| Leadership Role - Emulation | Hyderabad, India |
| Senior AI Engineer (Customer Solutions) | Tokyo, Japan |
| HR Advisor | Shanghai, China |
| Photonic Design Manager | San Jose, California |
| ASIC Physical Design & Implementation Lead | Bangalore, India |
| IP Verification Engineer | San Jose, California |
| Sr. Director, Program Management -Data Center GPU Validation | Austin, Texas |
| GPU Design Verification Engineer - Shader Core | San Diego, California |
| Staff Software Development Engineer - Rust, Compilers, and GPU Systems (3) | San Jose, California |
| Commercial Channel Sales Manager | Mumbai, India |
| AI/ML Compiler Developer (NPU Acceleration) | Hyderabad, India |
| Short Term 2027 Software Engineering Intern/Co-Op | MARKHAM, Canada |
| Short Term 2027 Software Engineering Intern/Co-Op | VANCOUVER, Canada |
| Short Term 2027 Program Management Intern/Co-Op | MARKHAM, Canada |
| Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op | VANCOUVER, Canada |
| Short Term 2027 Machine Learning/Artificial Intelligence Intern/Co-Op | MARKHAM, Canada |
| Short Term 2027 Graphics Software Engineering Intern/Co-Op | MARKHAM, Canada |
| Short Term 2027 Data Analyst Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Software Test Engineering Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term AGS Libraries Intern/Co-op | CALGARY, Canada |
| Summer 2027 Long Term Program Management Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Software Engineering Intern/Co-op | MARKHAM, Canada |
| Summer 2027 Long Term Diagnostics Design Engineering Intern/Co-Op | MARKHAM, Canada |
| Short Term 2027 Firmware Engineering Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Product Management Intern/Co-Op | CALGARY, Canada |
| Summer 2027 Long Term Machine Learning/Artificial Intelligence Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Hardware Design Engineering Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Hardware Design Engineering Intern/Co-Op | VANCOUVER, Canada |
| Summer 2027 Long Term Hardware Design Verification Engineering Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Graphics Software Engineering Intern/Co-Op | MARKHAM, Canada |
| Short Term 2027 Firmware Engineering Intern/Co-Op | VANCOUVER, Canada |
| Short Term 2027 Program Management Intern/Co-Op | CALGARY, Canada |
| Summer 2027 Long Term Firmware Engineering Intern/Co-op | MARKHAM, Canada |
| Summer 2027 Long Term Firmware Engineering Intern/Co-op | VANCOUVER, Canada |
| Short Term 2027 Hardware Design Engineering Intern/Co-Op | MARKHAM, Canada |
| Summer 2027 Long Term Analog and Mixed Signal Engineering Intern/Co-Op | MARKHAM, Canada |
| DFx-DV Lead | Bangalore, India |
| RTL Design Engineer | Hyderabad, India |
| Sr. Systems Validation Engineer – Data Center GPU | MARKHAM, Canada |
| CPU Verification Engineer | Fort Collins, Colorado |
| CPU Verification Engineer | Fort Collins, Colorado |
| Server Product Planning - Supply Chain | Austin, Texas |
| DFT Architect | San Jose, California |
| Embedded Systems Engineer - x86 Platforms | Austin, Texas |
| Embedded Systems Engineer - x86 Platforms | CALIFORNIA, California |
| Electronics Engineering Technician | Austin, Texas |
| System Software Lead - Linux Kernels | Bangalore, India |
| Verification Engineer | MARKHAM, Canada |
| Cloud & Customer Solutions Engineer - DC GPU | Bellevue, Washington |
| RTL Design & Validation Lead with DDR protocols exp | Hyderabad, India |
| Director, Program Management - DC GPU | Austin, Texas |
| RTL Design Manager | Hyderabad, India |
| Senior Virtual Platform Functional Modeling Engineer | Austin, Texas |
| Sr. Director, Pre-Si System Validation, Data Center GPU Products | San Jose, California |
| 2027 Term 1 Internship – Developing AI & Data Science Solutions to Accelerate AMD's Product Development | Singapore, Singapore |
| 2027 Term 1 Internship – AI-Driven BOM Generation & Management | Singapore, Singapore |
| Commercial Sales Account Manager | Shanghai, China |
| OSAT Execution Program Manager | Hsinchu, Taiwan |
| Business Planning Manager – x86 Embedded End Markets | San Jose, California |
| Storage and Memory Systems Architect | Austin, Texas |
| Senior PDE, Test and Product Engineering, Client APU | Austin, Texas |
| Lead/Staff AI/ML Validation Engineer | Bangalore, India |
| RTL Design & Integration Engineer | San Jose, California |
| Director, AI Instinct Stack Architecture | Austin, Texas |
| Senior Physical Design Engineer - Server SoC & Chiplet Implementation | Hyderabad, India |
| Staff FPGA Design Engineer | Penang, Malaysia |
| Product Manager - Embedded Platforms | Austin, Texas |
| Power Management Systems Engineer | Austin, Texas |
| Lead Systems Management Architect | Austin, Texas |
| Sr. Systems Design Engineer - Data Center GPU | MARKHAM, Canada |
| SLT Test Engineer | Austin, Texas |
| Design Verification Engineer | MARKHAM, Canada |
| FAE/Solution Architect, Data Center | Santa Clara, California |
| CPU Verification Engineer | Dublin, Ireland |
| System Testing and Automation Engineer | Bangalore, India |
| Senior AI/ML - NPU Validation Engineer | Hyderabad, India |
| CVP Customer Engineering Data Center GPU | Austin, Texas |
| AI Automation Design Packaging Lead | Austin, Texas |
| AI Instinct System Management Architect | Santa Clara, California |
| HPC and AI System Manager – Field Application Engineering | Taipei, Taiwan |
| CPU Architecture and RTL Design | Cambridge, United Kingdom |
| Staff Linux Device Driver Apps Engineer | Bangalore, India |
| Silicon Design Engineer | Hsinchu, Taiwan |
| C++/EDA Lead Software Development Engineer | Hyderabad, India |
| Principal Platform System Engineering Lead | Austin, Texas |
| Product Development Engineer | Austin, Texas |
| Lead IP Block level Verification Engineer | Hyderabad, India |
| ASIC Design Verification Engineer | Rochester, New York |
| IP Verification Engineer | San Jose, California |
| PD Architect | Bangalore, India |
| Reliability Engineer | Secaucus, New Jersey |
| Lead/Sr Lead Embedded Linux kernel device driver development engineer | Bangalore, India |
| DFX Design - Arch | Hyderabad, India |
| Principal Datacenter Platform Validation Lab Engineer | Penang, Malaysia |
| Strategic Sourcing Manager- Foundry and Advanced Packaging | Austin, Texas |
| DFT Engineer | Austin, Texas |
| Lead Board Design Engineer (X86 processors) | Bangalore, India |
| Staff Software Development Engineer - Rust, Compilers, and GPU Systems (1) | San Jose, California |
| Principal Staff Silicon Design Engineer - DDR Verification | Singapore, Singapore |
| Design Verification Engineer | Santa Clara, California |
| Senior Manager- Graphics Productization | Austin, Texas |
| Strategic Sourcing Manager | Secaucus, New Jersey |
| Strategic Sourcing Manager | Austin, Texas |
| Senior Linux Display Driver Development Engineer | Bangalore, India |
| SOC Performance Engineer | Austin, Texas |
| Mathematical/Statistical Software Engineer | Manchester, United Kingdom |
| AI Framework and Performance Experts(vLLM, SGLang) | Beijing, China |
| Datacenter Server Solution Architect | Shenzhen, China |
| Agentic AI Systems Architecture Fellow | Austin, Texas |
| Sr. Finance Analyst - Inventory & Operations | Austin, Texas |
| Senior Compiler Software Development Engineer - AI/ML | San Jose, California |
| AI Agent Engineer | Shanghai, China |
| Sr. Software Engineer - AI Triton Kernels | San Jose, California |
| Field Applications Engineer, Server Datacenter - Dell | Austin, Texas |
| Software Development Engineer - Rust, Compilers, and GPU Systems (2) | San Jose, California |
| 2026 Graduate Trainee - Product Development Engineer (December Intake) | Penang, Malaysia |
| Lead CPU Design Verification Engineer | Hyderabad, India |
| System Validation Technical Program Manager - Server | Austin, Texas |
| Integrated Circuit - Packaging Architect Engineer | Austin, Texas |
| Integrated Circuit - Packaging Architect Engineer | San Jose, California |
| Director Security Technology Engineering | Austin, Texas |
| Senior Linux Kernel Developer – Ethernet Drivers & Virtualization | Bangalore, India |
| Lead Software Engineer - SoC Diagnostics | Austin, Texas |
| DFT- SCAN/ATPG | Bangalore, India |
| RTL IP Design Engineer | Hyderabad, India |
| Senior Vivado Tools & Methodology Engineer – Technical Marketing | San Jose, California |
| Product Application Engineer - Run-Time Reconfiguration | Hyderabad, India |
| Product Application Engineer - Debug | Hyderabad, India |
| Staff Product Development Technical Program Manager | Austin, Texas |
| Lead Design Verification Engineer | Hyderabad, India |
| Customer Program Manager | Taipei, Taiwan |
| SoC DFX Scan / ATPG Engineer | OTTAWA, Canada |
| Sr. Firmware Engineer | Bangalore, India |
| Electrical Packaging Design Engineer | San Jose, California |
| Fellow Architect, Functional & Performance Verification | San Jose, California |
| Sr. Product Development Engineer | Secaucus, New Jersey |
| AI/ML Silicon Verification Solutions Engineer – Tools | San Jose, California |
| 2027 Term 1 Internship – Next-Gen Server Test & Qualification | Singapore, Singapore |
| 2027 Term 1 Internship – IC Design Exploration Intern | Singapore, Singapore |
| 2027 Term 1 Internship – Diagnostic Design Engineering | Singapore, Singapore |
| Lead CPU Power and Performance Architect | Santa Clara, California |
| Silicon Design Engineer | San Jose, California |
| Senior Equipment Engineer | Austin, Texas |
| Applied AI Engineer, Top Hardware Priorities | Santa Clara, California |
| Lead Power and Performance Attainment Engineer | Bangalore, India |
| Senior Sales Strategy and Planning Manager | Singapore, Singapore |
| Design Verification Engineer | Santa Clara, California |
| Director, Program Management (AI infrastructure) | San Jose, California |
| Senior Manager, AI Power & Performance Engineering | Austin, Texas |
| DFT Design Engineer | MARKHAM, Canada |
| Lead Software Systems Engineer – AI & Automation | Austin, Texas |
| HR Project Manager, M&A and HR Strategic Projects | Austin, Texas |
| SoC Design Verification Engineer | San Jose, California |
| Director, AI Systems – Scale-up, Scale-out and Networking | San Jose, California |
| AI Engineer, Recursive Self-Improvement for Compute | Santa Clara, California |
| Silicon Verification Engineer | Singapore, Singapore |
| Principal Debug Engineer | Austin, Texas |
| Sr. Firmware Engineer | Austin, Texas |
| Product Development Engineer | Hsinchu, Taiwan |
| Logic Design Engineer | Santa Clara, California |
| Sr. Signal Integrity/Power Integrity Engineer | Santa Clara, California |
| Lead SoC Validation Architect | Austin, Texas |
| Staff Product Development Engineer (Data centerFA / CPU/GPU) | Singapore, Singapore |
| Sr. Commercial Sales Account Manager | Shenzhen, China |
| Platform / System Debug Validation Engineer | Austin, Texas |
| Senior Field Application Engineer – AI | Austin, Texas |
| Systems Power Design Engineer | Austin, Texas |
| Sr. Forward Deployed AI Engineer | Santa Clara, California |
| Sr. AI/ML Platform Engineer | Santa Clara, California |
| Staff Product Development Engineer (SLT) | Singapore, Singapore |
| Enterprise Territory Executive - NYC Metro | New Jersey, United States |
| Sr. Liquid Cooling Thermal Design & Validation Engineer | Secaucus, New Jersey |
| Senior Manager Product Development Engineering (System Level Test) | Penang, Malaysia |
| Staff Process Technology Integration Engineer | Singapore, Singapore |
| Senior Staff Product Development Engineer (NPI) | Penang, Malaysia |
| Staff Product Development Engineer (NPI) | Penang, Malaysia |
| Lead RTL IP Design Engineer | Hyderabad, India |
| Senior GPU Compiler Development Engineer | Beijing, China |
| Systems Design Engineer | Secaucus, New Jersey |
| FPGA Prototyping Lead | San Jose, California |
| Supplier Quality Engineer | Shanghai, China |
| Sr. Engineering Leader: Developer SDKs for Embedded Markets | San Jose, California |
| Senior Product Development Engineer (SLT FA & Debug) | Singapore, Singapore |
| Firmware Engineer - Boot & SoC Initialization | Folsom, California |
| CPU Formal Verification Engineer | Cambridge, United Kingdom |
| Thermal Design & Validation Engineer | Secaucus, New Jersey |
| Product Development Engineer – Thermal Engineering | Austin, Texas |
| Post-Silicon Validation Engineer | Fort Collins, Colorado |
| CPU Product Application Engineer | Santa Clara, California |
| Senior Windows Kernel Developer – Device Drivers & Virtualization | Bangalore, India |
| Design Verification Engineer | Santa Clara, California |
| Prod. Planner & Controler | Hsinchu, Taiwan |
| Sr. Software Development Engineer - Adaptive and Embedded Group | San Jose, California |
| System Firmware Technical Engineer (1 yr contract) | MARKHAM, Canada |
| Sr. RTL Design Engineer – DDR/LPDDR Memory Controller | Austin, Texas |
| Packaging Engineer | Hsinchu, Taiwan |
| Cloud Service Provider Architect | Austin, Texas |
| Senior GPU Inference Performance Engineer | Santa Clara, California |
| Lead Systems Debug Engineer - Data Center GPU | Folsom, California |
| IP Verification Lead with PCIe | Bangalore, India |
| Principal Chromium Developer | Santa Clara, California |
| Principal Server and AI Product Architect | Austin, Texas |
| CPU Core RTL Design Engineer | Austin, Texas |
| Browser Ecosystem Enablement | Boxborough, Massachusetts |
| Fellow, Server Product Architecture | Austin, Texas |
| Principal Enterprise AI/HPC GPU Systems Architect | Austin, Texas |
| AI Infrastructure Solutions Marketing Manager | Santa Clara, California |
| University Recruiting Coordinator (Contract) | Austin, Texas |
| Performance Modeling and Optimization Engineering Director | Bangalore, India |
| Sr. Design Verification Engineer | Santa Clara, California |
| AI Research Scientist, Hardware AI Systems | Santa Clara, California |
| Staff Design Verification Engineer | Cambridge, United Kingdom |
| Sr Director, Silicon Performance and Design Execution | Santa Clara, California |
| Senior Performance Modeling Engineer | Santa Clara, California |
| Board Mechanical Engineer | Taipei, Taiwan |
| Senior Microprocessor VLSI Physical Design Engineer | Fort Collins, Colorado |
| Sr. Software Development Engineer – GPU Kernel Development | Santa Clara, California |
| Tax Counsel, Research and Planning | Austin, Texas |
| Software Engineer- GPU/AI/ML | Santa Clara, California |
| Lead Photonics System Engineer | San Jose, California |
| CPU Core Performance Staff Engineer | Austin, Texas |
| Senior SoC Power Modeling Engineer | Austin, Texas |
| Debug Lead Engineer | Bangalore, India |
| Senior Manager of Graphics Software Development | Poland |
| RTL Design Engineer | Hyderabad, India |
| Platform Architect – BIOS/Firmware & Customer Enablement | Bangalore, India |
| SoC DFX Scan / ATPG Engineer | MARKHAM, Canada |
| CPU Core Validation Senior Staff Engineer | Fort Collins, Colorado |
| Staff Formal Verification Engineer (GPU) | Cambridge, United Kingdom |
| Security Software Engineer | San Jose, California |
| CPU Design Verification Engineer | Bangalore, India |
| Principal Cache RTL Design - CPU Team | Bangalore, India |
| GPU Hardware Security Architect | Santa Clara, California |
| Senior Mechanical Product Engineer | Austin, Texas |
| Physical Design Engineer | VANCOUVER, Canada |
| 3D IC and ADVANCED PACKAGING CAD ENGINEER | MARKHAM, Canada |
| Analog/Mixed-Signal SerDes Design Engineer | Markham, Canada |
| Fellow, AI Performance Software Architect | Santa Clara, California |
| Principal System Software Architect, AI/GPU Platforms | Austin, Texas |
| Staff Research Engineer | San Jose, California |
| SR Design Verification Engineer | Santa Clara, California |
| Staff/Principal Engineer - AI/ML & System-Level Validation | Hyderabad, India |
| Strategic Sourcing Manager (PCBA/Server/Rack BOM) | Taipei, Taiwan |
| Design Verification Engineer | Santa Clara, California |
| Principal Robotics Simulation Architect | Austin, Texas |
| Pre-silicon Validation Engineer - Emulation | Bangalore, India |
| Sr. Software Development Engineer (1-Year Contract) | MARKHAM, Canada |
| Semicustom DFT Strategy Lead | Austin, Texas |
| Chip Lead / ASIC Director | San Jose, California |
| Hardware Systems Design Engineer – x86 Embedded Solutions | San Jose, California |
| Lead Diagnostics Software Engineer, ATE Integration | MARKHAM, Canada |
| Lead Diagnostics Software Engineer | Austin, Texas |
| Principal AI Software & Systems Architect | Austin, Texas |
| Sr. System RTL Designer/Serdes Architect | San Jose, California |
| ASIC Design Engineer - Networking/ DPU/ AI Systems | Santa Clara, California |
| Hardware System Architecture Fellow - AI & Data Center Networking | Santa Clara, California |
| Embedded Linux Power and Performance Engineer | Bangalore, India |
| Lead Software System Design Eng - System PNP | Bangalore, India |
| Staff Analog Layout Design Engineer | Penang, Malaysia |
| Post‑Silicon SoC & System‑Level Validation Engineer | Bangalore, India |
| SR ASIC Design Engineer - NoC & AXI Interconnect | Santa Clara, California |
| Principal/Senior Robotics AI Architect | San Jose, California |
| Staff SOC Silicon Design Engineer | Austin, Texas |
| Post Silicon Validation Manager | Bangalore, India |
| Technical Marketing Engineer – Datacenter GPU Clusters & Networking | Santa Clara, California |
| Product Planning Engineer-ASIC/SoC | San Jose, California |
| Senior Manager, GPU Application Engineering | Santa Clara, California |
| Business Development Manager | Austin, Texas |
| Lead HPC & AI Performance Engineer | France |
| Director, Product Planning-ASIC/SoC | San Jose, California |
| Director, Product Development Engineering-ASIC/SoC | San Jose, California |
| Software Ecoystem Architect | Austin, Texas |
| SoC Architect, Customer Engineering | San Jose, California |
| Principal AI Software Engineer | San Jose, California |
| ASIC Design STA Engineer | San Jose, California |
| Senior Manager Product Development Engineer ( NPI ATE ) | Penang, Malaysia |
| Sr. Product Manager, Instinct AI GPU Products | Austin, Texas |
| Director, System-Level Test Engineering | Penang, Malaysia |
| Formal Design Verification Engineer | Austin, Texas |
| Director, Customer Engineering, Compute and Enterprise AI | Taipei, Taiwan |
| Regional Employee Relations Manager | Singapore, Singapore |
| Principal GenAI Inference Optimization Engineer | San Jose, California |
| Principal / Senior GPU SW Performance Engineer — Post‑Training | San Jose, California |
| Field Application Engineer - AI | Taipei, Taiwan |
| Sr. Automotive Software Program Manager | Austin, Texas |
| Staff Design Verification Engineer | Romania |
| Principal Product Development Engineer - System Level Test | Singapore, Singapore |
| Advanced AI Workloads - Performance and Scalability Engineer | San Jose, California |
| Linux Kernel SW Engineer | Austin, Texas |
| Principal Software Engineer – PyTorch Training Frameworks | San Jose, California |
| Principal Engineer, Efficient GenAI | MARKHAM, Canada |
| Pre‑Silicon Power Modeling Leader — x86 SoCs | Austin, Texas |
| Manager – Post silicon Validation | Bangalore, India |
| Sr. Fellow -- Memory PHY Architect | Santa Clara, California |
| Senior Staff Software Development Engineer, Routing | San Jose, California |